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| Job Location | Hyderabad |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform) , designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking) ; Wireless/ 5G and Wired Communications; Automotive/ ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinxs core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moores Law, and the dawn of artificial intelligence (AI) .Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team!We are looking for highly motivated IP design engineering manager with experience in IP design/ verification to manage our Xilinx hyderabad, India based team of engineers.Education Requirements : Masters Degree in Electrical EngineeringYears of Experience : 3-5 Yrs. of direct management experience managing team of 5+ engineers Plus 7+ Yrs. of hands-on experience in IP Design/ Verification field.Skills required:Experience in IP development & VerificationExperience writing RTL using VerilogExperience using industry standard simulators e. g. QuestaSim, ncsim, vcsFamiliarity with System Verilog/ UVM methodologyPerl/ Tcl scripting knowledge essentialAbility to co-ordinate with teams located in different geographical locationsGood communication skills Verbal & WrittenAble to handle difficult conversations/ situations, able to resolve conflicts,
Keyskills :
safetycommissioning preventive maintenanceiso documentationdata center system verilogdesign engineering