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| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | IT - Software |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Responsibilities Advanced methodologies for the design and verification of System on Chips (SoC) , Semiconductor IP , Embedded systems & Embedded software SystemC models for various ESL use cases: Virtual prototype development & deployment , Architecture & Performance modelling , Software driven verification , Co - simulation , Co - emulation , High level Synthesis SystemC models at various abstraction levels: Untimed , TL4: TLM2.0 Loosely Timed , TL3: TLM2.0 Approximately Timed , TL1: Transaction level cycle accurate , TL0: Pin level Adaptors and transactors to connect the models / designs simulating at different abstraction levels or in different simulation environment Verification of models at IP & SoC level Required Skills: Must: C / C , Data structures , Algorithms , OOPs concepts SoC verification , System Verilog , UVM Familarity with the functional specification of SoC / Microcontrollers at register level Strong understanding of: System on Chip (SoC) architecture , Semiconductor IP , bus protocols , chip interfaces , communication protocols , design and verification concepts Willing to learn SystemC based ESL methodologies Desirable: IP - XACT , UVM - SystemC , SystemC modeling Educational Qualification: Bachelors / Master Degree in Electronics Engineering , Computer Science , VLSI,
Keyskills :
high level synthesissystem verilog data structuresembedded systems computer sciencesoc verification embedded softwaresoc