| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Hyderabad Jobs |
| Banglore Jobs |
| Chennai Jobs |
| Delhi Jobs |
| Ahmedabad Jobs |
| Mumbai Jobs |
| Pune Jobs |
| Vijayawada Jobs |
| Gurgaon Jobs |
| Noida Jobs |
| Oil & Gas Jobs |
| Banking Jobs |
| Construction Jobs |
| Top Management Jobs |
| IT - Software Jobs |
| Medical Healthcare Jobs |
| Purchase / Logistics Jobs |
| Sales |
| Ajax Jobs |
| Designing Jobs |
| ASP .NET Jobs |
| Java Jobs |
| MySQL Jobs |
| Sap hr Jobs |
| Software Testing Jobs |
| Html Jobs |
| Job Location | Bangalore |
| Education | Not Mentioned |
| Salary | Not Disclosed |
| Industry | Telecom / ISP |
| Functional Area | General / Other Software |
| EmploymentType | Full-time |
Job Description Teach M.Tech CoursesGuide M.Tech ProjectsWork on Research projectsDesign creation using Verilog to optimize performance, area, and power using Cadence EDA toolsInitial Verification and Debugging Test Failures.Specifying Cover Points, Reviewing Functional and Code Coverage results and assisting to increase coverage.Providing assistance to resolve synthesis and timing analysis issues.Design Documentation Creation Skills Set Asic DesignVerilogSTAFPGAVerilog, system VerilogAMBA/USB/PCI protocolKnowledge on UVM/VMM/OVMKnowledge on Processors 8051/ARM/Cortex,
Keyskills :
timing analysisedasetasicdesigntimingverilogcadenceresearchanalysissynthesisdebuggingprocessdocumentationTiming ClosurePhysical DesignPhysical VerificationPrimetimeParasitic Extractionperfmance