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Digital Design Engineer

6.00 to 10.00 Years   Bangalore   27 Jul, 2024
Job LocationBangalore
EducationNot Mentioned
SalaryRs 18 - 30 Lakh/Yr
IndustrySemiconductors
Functional AreaEmbedded, VLSIEngineering Design / Construction
EmploymentTypeFull-time

Job Description

    # Digitial Design Engineer # Vlsi # UvmExperience: 6 to 10 YearsNp: Immediate Joiner OR 15 DaysLocation: Bangalore
    1. Digital design fundamentals.
    2. Good verification skills (Verilog, system Verilog).
    3. Strong Knowledge of UVM methodology, with hands on experience of coding testbenches. with Good debug skills.
    4. AMBA (AXI, AHB, APB) Good to have protocol knowledge.
    5. Exposure to Arm based SOC preferred but not a must.
    6. Scripting perl, tcl, Make, shell scripting.
    Note Look for digital design engineer who have exp on UVM methodology and use Verilog and sytem Verilog for verifications.
    1. Scripting perl, tcl, Make, shell scripting.
    Who all Are interested please drop Your Resume to Email Id: hidden_email.

Keyskills :
scriptingveriloguvmsoc

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